In the current mobile/multimedia market, there is a great need for long standby time, or rather, low leakage products. The 28SLP process was originally designed to meet that need. However, there is also a demand for higher performance with low power consumption. The drive for high performance requires high speed operation of microelectronic components requiring high drive currents. Typically, the structural and doping parameters tending to provide a desired increase in drive current adversely impact leakage current. High-k metal gate (HKMG) electrodes have evolved for improving the drive current by reducing polysilicon depletion.
In modern CMOS technologies, embedded silicon germanium (SiGe) source/drain areas are standard in PFET devices as they improve performance by introducing uniaxial strain into the channel. However, to date the 28SLP process does not include an embedded source/drain stressor such as SiGe in the p-active source/drain regions and therefore is lacking in performance due to lower hole mobility.
A need therefore exists for methodology enabling fabrication of an SLP device with high performance by incorporating SiGe into an HKMG process, and the resulting device.